Per Vices: RX Chain

This page allows the configuration of the entire receive chain from the RF front end to the digital backend. Select the channel that is being configured.

The signal is first sampled from the antenna which is connected to the SMA connector on the Crimson. The analog signal is fed through an RF switch based on the frequency of the signal being sampled. High band is reserved for signals greater than 500 MHz, and the low band is reserved for signals less than 500 MHz. Crimson currently supports signals up to 6 GHz. Within the respective RF chains (high and low) it filters the analog signal and divides it into I and Q channels for advanced signal processing on the FPGA. The high band offers an LNA for weaker signals, and a frequency mixer for desired intermediate frequencies prior to signal processing. The low band offers a varactor circuit to fine tune the delay between the I and Q channel. An ADC driver is common between both bands (high and low) prior to the ADC. The ADC will send the data across to the DSP chain within the FPGA at a rate of 322 MSPS using the JESD serial interface. The DSP chain will downsample the samples resulting in an adjusted final sample rate. The frequency of the signal can be adjusted prior to decimation.

Channel Enable

Radio Configuration

RF Band

LNA Enable

Synthesizer Frequency


Varactor Group Delay


RX Gain - ADRF6518

RX DSP Chain

Reset DSP

DSP Signed Data

Phase Increment


Sample Rate

Desired: SPS   
Actual: 322265625 *

Destination Link

IPV4 IP Address
MAC Address
UDP Port

Loopback Mode

RX Board Control


Channel IC's
Board Version

Board Temperature
Console Output